in science and tech

Wasted IC Design Engineering Effort

Wasted IC Design Engineering Effort

TL;DR: IC design costs too much. There’s no version control in IC design, you can’t fork someone’s design, and the cost of failure is abnormally high. There’s no feedback loop for electronics commercialization. The cost of failure is too high. One company, Efabless, is fixing it all.

The Reality for many IC designers.

Academic and independent projects go to the graveyard. In many universities there is a clear process for “transferring” innovation to the commercial domains. When it comes to VLSI/Semiconductor education and research, it doesn’t seem to have a path for much effort, evident in “results” of learning as well as partially developed systems – SW or HW – including many prototyped chip.

A backlog of potential innovation and very real potential.

Depending on where you go in the world, the “results” are stored in drawers, boxes, and some form of electronic storage on dusty computers. I googled ‘chip layout’ and found IC(integrated circuit) designs that never became real – I am generalizing – but many of them were hard and long engineering effort by students and tinkerers with new ideas. I became mesmerized by the chip layouts I was able to find on google images. (image search: chip layout). I could stare endlessly.

Commercializing dead designs via additional development or enabling the original designers to build their idea with free resources is worth the effort.

If these designs – are collected, there is a chance that 10% or even 5% of these designs – over time and space – would have valuable innovation – that’s partially developed and, IF, seen by a potential “consumer” – could solve a key problem, especially if it is evolved with a commercial solution in mind. This has had me thinking a lot about the space. One of the reasons Semiconductor investors have gone down by an order of magnitude in the last 10 years is the unforgiving cost of failure in the space.

Screen Shot 2015-07-03 at 21.14.48

Source (Gartner)

The Four Causes of Graveyard IC Designs

  1. ‘Experts’ – who believe they can predict future demand of IC’s when in fact they have no clue about the future. The barrier to innovation is the ‘advice’ of someone who was once an expert thinking that they can predict the future of electronics and/or the viability of an IC design in the market.
  2. There’s a lot of confusion for students about who owns the intellectual property which prevents designs from going into prototyping production. Many Universities have IP transfer policies but these are difficult to navigate because the process of IP transfer is often invisible. The University students often don’t pursue patents and when they don’t do that, there’s nothing to sell and the University has nothing to sell because it’s abstracted. It’s not clear as to what is the innovation. The process of IP registration also has abnormally high administrative costs as well which are not always funded by the school. Who’s going to pay for the patent?
  3. Most IC’s are being built with donated technologies [hardware, labs, software] sponsored (for good reasons) by commercial entities preventing commercialization and landlocking the outcome of academic work into graveyards. This also prevents the 2 guys in a garage model as the all in cost of a single IC prototype from A to Z might be ~$400K. Single IC design software licenses range from $10,000 to $50,000 (or more) a license. Companies that make IC design software: Cadence, Synopsis, and Mentor Graphics and many smaller with specific applications. These companies had significant positive contribution on the way the semiconductor industry has evolved. Yet, they are also bound by many constraints that do not allow for changing the accessibility of their software.
  4. Access to manufacturing, physical prototyping, and lab instrumentation require extremely high minimum order quantities.As a result, even the prototyping services like MOSIS, CMP, andEuropractice solve the problem to a certain degree as a mediator, but it’s still not a complete and highly accessible solution. They provide multi-project wafers(mpw’s) which share the cost of the wafer across people, but there still remains no one-stop-shop where you can do it all. This presents a barrier to individuals from producing IC’s.

Why it matters: How many chip designs are useful? How many tinkerers want to create their own IC’s?

How many of these chip designs are useful? More importantly, what happens to the 2 guys in a garage who have an idea and need to build an IC? The cost of failure for the ’2 guys in a garage’ is too high. More importantly, the cost of failure in IC’s is just too high. It doesn’t mean that all of the chip layouts are valuable, but if even 10% are useful, that’s meaningful. Designing an IC takes weeks and months of engineering effort. Can any of the that work be collected, shared, allowing many other eye and minds to see if there is value?

Another chance…

I started questioning Mohamed Kassem about 30 days ago regarding what I had found. He’s the CEO of efabless, a semiconductor company that’s fundamentally changing the way electronics are designed and commercialized. Here’s an interesting article about his company: efabless Q&A.

I gathered that efabless is doing 1 things that make them very unique.

Open innovation and Co-creation for hackers, makers, and tinkerers. –They provide an environment in which electronics designers can ideate, build, and order full production quality IC’s at 1/20th the cost and receive them in the mail in 4 to 10 weeks.

If you designed an IC in and it’s in the graveyard or you dream of designing an IC and bringing it to production, you should read on…….

efabless is building the world’s first, complete and largest open-source library of IC designs. If it becomes a reality, efabless would be the first community/open-cocreation-driven fabless IC design company with a special market place for semiconductor chips designed by community and commercialized by efabless. Imagine github on steroids for IC design with a built in customer feedback loop.

A large stadium full of IC collaborators…..

Think along localmotors.com, quirky.com,topcoder.com, andinnocentive.com. By putting the pieces together and allowing the engineers and innovators to push designs, get feedback, buy in, and maybe some amazing products could be commercialized. Think about what happened in the Open Source SW and the outstanding innovation from the community that surpassed the largest corporations.

Imagine if you could ‘fork’ an IC design and get compensated with a royalty if someone forked your designs.

We should contribute to this open library to become an early adopter of the open IC community. They’re inviting people from the community to contribute designs. I’m positive that efabless is the pioneer in this space of OpenIC, it will be one of those huge “More than Moore” level of innovations. If you designed a pre-silicon or post-silicon IC that is now in the graveyard or have an idea you want to build? efabless will enable you to resurrect it or help you build it, give you all the tools to do so, and give you a royalty on any commercialization of your chip design.

Mohamed Kassem: “If you have any pre-silicon or post-silicon IC Designs that are now in the graveyard or if you’ve always had an idea that you’ve wanted to design, we are calling you and want to connect. If you want to get your own design ideas made into an IC, we want to connect. We want to grant you access to everything you need to design or redesign the chip at no cost to you and we’ll make it available to the world, credited to you, and if commercialized, you get a guaranteed royalty. Email me directly with the word chip layout at mkk [at] efabless [dot] com and we’ll grant you access to efabless’s tinker.link program”

If you do email efabless with a design, please send them:

  • A little information in who you are and why you’re interested in IC design.
  • Relevant attached files whether it’s GDS files or images or anything relevant.
  • Disclaimer: You should have the ownership rights over whatever you send their way.

My Next post. I’ll be putting another post on how efabless is making the cost of failure extremely low in the world of electronics commercialization and why I’m excited about their technology. PS: A fun little game for IC designers is to look at the images and try to guess what the chip is by identifying resistors, RF components, etc… For example…